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ICmic Announces Availability of Ultra Low Power 1.2V DAC IC - ICM7700 Series
Dialer, Ringer and Speech Circuit. ICM7102 Phone IC.
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ICmic keeps high standard on our layout design through:

 
High Reliability

ICmic maintains high reliability by:

  • Using metal slots for very wide power busses
  • Prevent charge induced damage by applying antenna rules
  • Adding guard rings to input and output circuits. We also have extra taps to prevent latch ups from occurring.
  • Making sure that the power bus and critical signals adhere to foundry current density limits.
  • Verification tools that would be used are DRC, LVS and Metal Density. Other verifications will be run based on the customer’s request.
Smallest Die Size

Die size is a major cost factor in every product. Therefore, in ICmic, we are die-size conscious and we have developed ways to reduce the die size.

  • Using metal slots for very wide power busses
  • Floorplan – we come out with an initial floorplan to review the layout area required.
  • Parameterized cells. These are standard cells that acquire minimum areas.
  • Besides using the parameterized cells, we also use custom layout to ensure we use the smallest space.
Hierarchical Design :

Usually, layout has been done on a flat level but as design complexity is increasing, we need to change as flat level design will cost higher in term of time.

Hierarchical design will reduce the overall design time as all the sub-blocks can be designed in parallel and verified separately.

Moreover, since hierarchical blocks are smaller, they do not need the extensive use of place and route tool.

hierarchical design

Concurrent Layout

ICmic offers the service of concurrent design to reduce the design to market time for the customers.

  • Concurrent design means the layout will begin together with the IC design.
    We can start the layout even though the customer has not finished the schematic design. The layout will begin based on a floorplan that has been agreed by the customer or an initial schematic design.
  • While the layout design is on progress, the customer can still do edits on their schematic design.
  • This way, the design time cycle can be reduced significantly.
  • The schedule for concurrent design will be fixed based on the floorplan or the initial schematic.
  • As for the edits that come along, the schedule will be adjusted based on the extent of the edits.